UDR_ERR_EN=0, GW_BOF_EN=0, EOF_EN=0, GW_UDR_ERR_EN=0, BOF_EN=0, GW_EOF_EN=0
LCDC interrupt enable register
| BOF_EN | Beginning of frame interrupt enable 0 (0): Mask interrupt. 1 (1): Enable interrupt. |
| EOF_EN | End of frame interrupt enable 0 (0): Mask interrupt. 1 (1): Enable interrupt. |
| RESERVED | no description available |
| UDR_ERR_EN | Under run error interrupt enable 0 (0): Mask interrupt. 1 (1): Enable interrupt. |
| GW_BOF_EN | Graphic window beginning of frame interrupt enable 0 (0): Mask interrupt. 1 (1): Enable interrupt. |
| GW_EOF_EN | Graphic window end of frame interrupt enable 0 (0): Mask interrupt. 1 (1): Enable interrupt. |
| RESERVED | no description available |
| GW_UDR_ERR_EN | Graphic window under run error interrupt enable 0 (0): Mask interrupt. 1 (1): Enable interrupt. |
| RESERVED | no description available |